1. Field of the Invention
The invention relates to a semiconductor device and fabrications thereof, and more particularly to a memory device and fabrications thereof.
2. Description of the Related Art
Non-volatile memory, such as flash memory, stores data regardless of electrical power supplied, and reads and writes data by controlling a threshold voltage of a control gate. One of the advantages of flash memory is its capacity for block-by-block memory erasure. Furthermore, the speed of memory erasure is fast, and normally takes just 1 to 2 seconds for the complete removal of an entire block of memory. Therefore, in recent years, it is widely applied for consumer electronics devices, such as digital cameras, mobile phones, personal stereos, and laptops.
FIG. 1 is a cross-section showing a conventional split gate flash memory cell. The memory cell includes a silicon substrate 100 having a source region S and a drain region D. A source line 110 is disposed on the source region S. A floating gate 104 and silicon oxide layers 102, and 106 are disposed over the substrate 100 outside the source line 110, and the floating gate 104 is insulated from the source line 110 by a spacer 108. A control gate 114 with an “arc” profile formed by a spacer method is disposed over the substrate 100 outside the floating gate 104 and insulated by a inter poly oxide 113 and the high voltage oxide 190. In addition, the bit line 120 disposed in the contact hole 119 is insulated from the control gate (word line) 114 by the interlayer dielectric (ILD) 118 and the spacer 116.
This split gate flash memory device, however, suffers some drawbacks when scaled down to small dimensions. For example, a source junction S of the split gate flash memory device requires high breakdown voltage (more than 10 V). Further, the split gate flash memory device also suffers large lateral diffusion at the source junction S, large cell size, high programming current, process complexity creating a sharp corner for the floating gate and low endurance. In addition, the inter poly oxide 113 and the high voltage oxide 190 cannot be independently optimized.